Radiation Tolerant Electronics

SINTEF has experience in working with niche technologies for harsh environments including radiation hard/tolerant and high temperature applications. Major achievements were realized by design technology, allowing radiation exposed microelectronics and high temperature circuits to be fabricated at commercial foundries in CMOS/BiCMOS processes. This feature is achieved solely from ingenious circuit design and layout techniques.

SINTEF’s approach operates on the principle of providing electronic feedback and additional guard-rings to compensate for the impacts of a cosmic particle strike, (single-event effects-SEE) and high temperature effects and considering that there is a synergy between design and process required for radiation hard and high-temperature ASIC solutions.
 
For radiation exposed electronics, the most critical single event effects in integrated circuits are single event upset (SEU), which temporarily changes the state of a memory cell, and single event latchup (SEL), a potentially catastrophic high-current state.

SINTEF uses two general approaches to meeting the need for electronic systems in high radiation and high temperature environments.

The first approach uses radiation tolerant (RT) or temperature tolerant (TT) ASIC implementation, achieved through design only, where the circuits are fabricated in commercial ASIC processes without any special process steps oriented towards improving radiation hardness or the temperature effects.

The second approach uses, radiation hard or high temperature specific processes where the circuits are fabricated in a specialized foundry that executes special steps to enhance total dose radiation hardness, in addition to design methods.  


Published February 8, 2008